Digital System Design Laboratory Assignments

1) Design and Implementation of a 2-bit Adder/Subtractor Unit

The objective of the problem is the design of a two bit adder-subtractor unit; followed by its implementation in the bred board. Among the five input bits, the two operands would be specified by two bits each and the last input, called the control bit determines the state of the circuit – Adder or Subtractor. The output of the circuit is seen in the three Light Emitting Diodes (LEDs), the MSB signifying the carry bit. The implementation shall not employ any adder IC as a whole, but the latter should be implemented by means of fundamental gates. The output of the adder-subtractor unit will be available in twos complement form.

2)Design and Implementation of a 2-bit Multiplier Unit

The objective of the problem is the design of a two bit multiplier unit; followed by its implementation in the bred board. Among the four input bits, the two unsigned operands would be specified by two bits each. The output of the circuit is seen in the four Light Emitting Diodes (LEDs). The implementation shall not employ any adder IC as a whole, but the latter should be implemented by means of fundamental gates.

3) Design and Implementation of a 4-bit Presettable Up-Counter

The objective of the problem is the design of a four bit up-counter, with the facility of presetting the input; followed by its implementation in the bred board. The four input bits would specify the count that is to be loaded in the counter, and the state of the counter would be determined from the combined output of the four Light Emitting Diodes (LEDs), representing the 4 bits of the count successively. The implementation shall not employ any counter IC as a whole, but the latter should be implemented by means of JK flip-flops. The upward counting will continue till the count displayed is 15 ( i.e. 11112 ) , after which the circuit comes to a halt state.

Complete Reports of the above works are provided as a single zip file at:

https://docs.google.com/leaf?id=0B-mmfn2DeWvJNGM0NTVmMDQtNTIzMC00NDU2LTk5ZmUtNzk3MjE4MmI5ZjM5&hl=en

Done as Digital Systems Design Laboratory (5th Semester, CSE, JU)