Thursday, February 10, 2011

VLSI Laboratory


VHDL Codes for FPGA implementation
  1. Full Adder (1-bit)
  2. Full Adder (4-bit)
  3. 7-Segment Decoder (3-8)
  4. 4-bit ALU
  5. Comparator (4-bit)
  6. Multiplexer (8 X 1)
  7. Demultiplexer (1 X 8)
  8. Binary to Gray Code Conversion
  9. (Even) Parity Generator
  10. D Flip Flop
  11. T flip-flop
  12. Binary Coded Decimal Adder(1 bit)
  13.  MULTIPLIER(2 bits)
  14.  Decoder(3-8)
  15.  Encoder(0-9)
  • In Viva you have to implement and run a full program (obtained by card picking).
Complete Source Codes, with UCF file and circuit diagram are provided here:
https://docs.google.com/leaf?id=0B-mmfn2DeWvJZDdkYjAxZTUtODQ5Yy00NzY5LWE1YjEtY2ZiMDk4ZmJiODYy&hl=en

1 comment:

  1. What abt the rest??? Specially 7 segment encoder...

    ReplyDelete

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